function [hStart,hEnd,valid,reset,enable] = maxpool_fsm(hStart_in,hEnd_in,valid_in) %states: ready = 0; vector = 1; matrix = 2; wait_for_next_line=3; % using persistent keyword to model state registers in hardware persistent curr_state; if isempty(curr_state) curr_state = ready; end % switch to new state based on the value state register switch (curr_state) case ready, if (hStart_in==true && valid_in==true) curr_state=vector; valid=false; reset=true; enable=true; hEnd=false; hStart=true; else curr_state=ready; valid=false; reset=true; enable=true; hEnd=false; hStart=false; end case vector, if (valid_in == true && hEnd_in==true) curr_state=wait_for_next_line; valid=true; reset=false; enable=true; hEnd=true; hStart=false; elseif (valid_in == true) curr_state=matrix; valid=true; reset=false; enable=true; hEnd=false; hStart=false; else curr_state=vector; valid=false; reset=true; enable=true; hEnd=false; hStart=false; end case matrix, if (hEnd_in==true) curr_state=wait_for_next_line; valid = false; reset = false; enable = false; hEnd=true; hStart=false; elseif (valid_in==true) curr_state=vector; valid = false; reset = true; enable = true; hEnd=false; hStart=false; else curr_state=matrix; valid=false; reset=false; enable=false; hEnd=false; hStart=false; end case wait_for_next_line, if (hEnd_in==true) curr_state=ready; valid = false; reset=false; enable = false; hEnd=false; hStart=false; else curr_state=wait_for_next_line; valid = false; reset=false; enable = false; hEnd=false; hStart=false; end otherwise, valid = false; reset=false; enable = false; hEnd=false; hStart=false; end
I solved the issue by not declaring the state variable as persistent, but instead using a delay outside the matlab function block:
function [hStart,hEnd,valid,reset,enable,curr_state_out] = maxpool_fsm(curr_state_in,hStart_in,hEnd_in,valid_in) %states: ready = uint8(0); vctr = uint8(1); mtrx = uint8(2); wait_for_next_line=uint8(3); % using persistent keyword to model state registers in hardware %persistent curr_state; curr_state_out=uint8(0); if isempty(curr_state_out) curr_state_out = ready; end % switch to new state based on the value state register switch(curr_state_in) case ready, if (hStart_in==true && valid_in==true) curr_state_out=vctr; valid=false; reset=true; enable=true; hEnd=false; hStart=true; else curr_state_out=ready; valid=false; reset=true; enable=true; hEnd=false; hStart=false; end case vctr, if (valid_in == true && hEnd_in==true) curr_state_out=wait_for_next_line; valid=true; reset=false; enable=true; hEnd=true; hStart=false; elseif (valid_in == true) curr_state_out=mtrx; valid=true; reset=false; enable=true; hEnd=false; hStart=false; else curr_state_out=vctr; valid=false; reset=true; enable=true; hEnd=false; hStart=false; end case mtrx, if (hEnd_in==true) curr_state_out=wait_for_next_line; valid = false; reset = false; enable = false; hEnd=true; hStart=false; elseif (valid_in==true) curr_state_out=vctr; valid = false; reset = true; enable = true; hEnd=false; hStart=false; else curr_state_out=mtrx; valid=false; reset=false; enable=false; hEnd=false; hStart=false; end case wait_for_next_line, if (hEnd_in==true) curr_state_out=ready; valid = false; reset=false; enable = false; hEnd=false; hStart=false; else curr_state_out=wait_for_next_line; valid = false; reset=false; enable = false; hEnd=false; hStart=false; end otherwise, valid = false; reset=false; enable = false; hEnd=false; hStart=false; end
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